SiFive Launches World's First Linux-Capable RISC-V Based SoC

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February 7, 2018
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style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0!important;text-align:left;visibility:hidden;width:0"></th></tr></table></th>  </tr></tbody></table><table class="row sub-header"style="background:#00837E;border-collapse:collapse;border-spacing:0;display:table;padding:0;position:relative;text-align:left;vertical-align:top;width:100%"><tbody><tr  style="padding:0;text-align:left;vertical-align:top"><th class="small-12 large-12 columns first last" style="Margin:0 auto;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0 auto;padding:0;padding-bottom:16px;padding-left:30px;padding-right:30px;text-align:left;width:570px"><table style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tr style="padding:0;text-align:left;vertical-align:top"><th style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0;text-align:left"><table class="spacer" style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><td height="16px" style="-moz-hyphens:auto;-webkit-hyphens:auto;Margin:0;border-collapse:collapse!important;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;hyphens:auto;line-height:16px;margin:0;mso-line-height-rule:exactly;padding:0;text-align:left;vertical-align:top;word-wrap:break-word">&#xA0;</td></tr></tbody></table>  <h4 class="text-center" style="-moz-hyphens:none;-webkit-hyphens:none;Margin:0;Margin-bottom:10px;color:#fff;font-family:Montserrat,Arial,sans-serif;font-size:18px;font-weight:400;hyphens:none;line-height:22px;margin:0;margin-bottom:10px;padding:0;text-align:center;text-transform:uppercase;word-break:none;word-wrap:normal">News From SiFive</h4><h5 class="text-center" style="-moz-hyphens:none;-webkit-hyphens:none;Margin:0;Margin-bottom:10px;color:#fff;font-family:Montserrat,Arial,sans-serif;font-size:14px;font-weight:500;hyphens:none;line-height:18px;margin:0;margin-bottom:0;padding:0;text-align:center;word-break:none;word-wrap:normal">Transmitted by PR Newswire for Journalists on <span class="prevent-break" style="display:inline-block">February 07, 2018 09:00 AM EST </span></h5></th><th class="expander" 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style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0;text-align:left">                <table class="spacer" style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><td height="24px" style="-moz-hyphens:auto;-webkit-hyphens:auto;Margin:0;border-collapse:collapse!important;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:24px;font-weight:400;hyphens:auto;line-height:24px;margin:0;mso-line-height-rule:exactly;padding:0;text-align:left;vertical-align:top;word-wrap:break-word">&#xA0;</td></tr></tbody></table>               <h1 style="Margin:0;Margin-bottom:10px;color:#4D4E53;font-family:Montserrat,Arial,sans-serif;font-size:20px;font-weight:500;line-height:28px;margin:0;margin-bottom:0;padding:0;text-align:left;word-wrap:normal">SiFive Launches World's First Linux-Capable RISC-V Based SoC</h1> <table class="spacer" style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><td height="24px" style="-moz-hyphens:auto;-webkit-hyphens:auto;Margin:0;border-collapse:collapse!important;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:24px;font-weight:400;hyphens:auto;line-height:24px;margin:0;mso-line-height-rule:exactly;padding:0;text-align:left;vertical-align:top;word-wrap:break-word">&#xA0;</td></tr></tbody></table> </th><th class="expander" style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0!important;text-align:left;visibility:hidden;width:0"></th></tr></table></th>              </tr></tbody></table> <table class="row content" style="background:#fff;border-collapse:collapse;border-spacing:0;display:table;padding:0;position:relative;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><th class="small-12 large-12 columns first last" style="Margin:0 auto;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0 auto;padding:0;padding-bottom:16px;padding-left:30px;padding-right:30px;text-align:left;width:570px"><table style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tr style="padding:0;text-align:left;vertical-align:top"><th style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0;text-align:left"> <table class="spacer" style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><td height="24px" style="-moz-hyphens:auto;-webkit-hyphens:auto;Margin:0;border-collapse:collapse!important;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:24px;font-weight:400;hyphens:auto;line-height:24px;margin:0;mso-line-height-rule:exactly;padding:0;text-align:left;vertical-align:top;word-wrap:break-word">&#xA0;</td></tr></tbody></table><p class="sub-headline" style="Margin:0;Margin-bottom:10px;color:#4D4E53;font-family:Montserrat,Arial,sans-serif;font-size:14px;font-weight:500;line-height:20px;margin:0;margin-bottom:16px;padding:0;text-align:left"><strong>RISC-V leader announces availability of HiFive Unleashed development board, shows real-world use of open-source hardware</strong><p><span class="xn-location">SAN MATEO, Calif.</span>, <span class="xn-chron">Feb. 7, 2018</span> /PRNewswire/ --&nbsp;<a href="http://email.prnewswire.com/wf/click?upn=TwIh0OIjG8BOSB67uKqqj48r3QFvSyyIYkJ57msUMu4-3D_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le75TJ7qMxURSXprenmt-2FSG-2BHgDkF-2BYqkG-2BFxqszkV6eTIYxX3CGepI804AocO8eDWkPg99zTn-2BtxqLVatJTVuL3O3qayTezAf5wOTOhfY38UvXiHdbNfMd2SnyIJjEV8fW7hzWi1Y2WFk7c0-2B1tgIQaoeSixy6Qf-2FKzRnfzHVsXqKI171dAfcH0zJt8TGkK3jf3mUeMpuc89L4yjDJZeEOPKwu8MFvQcC4fXqOSeXC0p15rGGa8dvKUgBmHLFQ-2FIvShJAVA3c55PZjOEsLdxdhoFw-3D-3D" rel="nofollow" target="_blank">SiFive</a>, the leading provider of commercial RISC-V processor IP, launched the industry's first Linux-capable RISC-V based processor SoC. The company demonstrated the first real-world use of the HiFive Unleashed board featuring the Freedom U540 SoC, based on its U54-MC Core IP, at the FOSDEM open source developer conference on Saturday. </p> 
   <p>During the session, SiFive provided updates on the RISC-V Linux effort, surprising attendees with an announcement that the presentation had been run on the HiFive Unleashed development board. With the availability of the HiFive Unleashed board and Freedom U540 SoC, SiFive has brought to market the first multicore RISC-V chip designed for commercialization, and now offers the industry's widest array of RISC-V based Core IP.</p><th class="expander" style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0!important;text-align:left;visibility:hidden;width:0"></th></tr></table></th></tr></tbody></table><table class="row content" style="background:#fff;border-collapse:collapse;border-spacing:0;display:table;padding:0;position:relative;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><th class="small-12 large-12 columns first last" style="Margin:0 auto;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0 auto;padding:0;padding-bottom:16px;padding-left:30px;padding-right:30px;text-align:left;width:570px"><table style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tr style="padding:0;text-align:left;vertical-align:top"><th style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0;text-align:left"><center data-parsed="" style="min-width:510px;width:100%"><img src="https://mma.prnewswire.com/media/387623/sifive_logo__logo_Logo.jpg" alt="" align="center" class="float-center" style="-ms-interpolation-mode:bicubic;Margin:0 auto;clear:both;display:block;float:none;margin:0 auto;max-width:100%;outline:0;text-align:center;text-decoration:none;width:auto"></center></th><th class="expander" style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0!important;text-align:left;visibility:hidden;width:0"></th></tr></table></th></tr></tbody></table><table class="row content" style="background:#fff;border-collapse:collapse;border-spacing:0;display:table;padding:0;position:relative;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><th class="small-12 large-12 columns first last" style="Margin:0 auto;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0 auto;padding:0;padding-bottom:16px;padding-left:30px;padding-right:30px;text-align:left;width:570px"><table style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tr style="padding:0;text-align:left;vertical-align:top"><th style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0;text-align:left">
   <p>"This is truly a historic moment and a major milestone for RISC-V," said Yunsup Lee, co-founder and CTO, SiFive. "From the first days of inventing RISC-V, Andrew, Krste, and I have been anticipating this moment. As the leading champions of the RISC-V ISA, we're proud to debut the HiFive Unleashed board to inspire new innovations and experience this record achievement for the RISC-V community."&nbsp; </p>
   <p>With the Freedom U540, the first RISC-V based, 64-bit 4+1 multicore SoC with support for full featured operating systems such as Linux, the HiFive Unleashed development board will greatly spur open-source software development. The underlying CPU, the U54-MC Core IP, is ideal for applications that need full operating system support such as artificial intelligence, machine learning, networking, gateways and smart IoT devices.</p>
   <p>The company also announced its first hackathon, which will be held during the <a href="http://email.prnewswire.com/wf/click?upn=7pXYN9UXijMIpxbYHNPIYgIwqqqn9ZqelQfN1OlMOpWqqqDz9e5RgS0-2F9DgkzHm-2Bo-2FK9SOLVCYFinzIsoKkOje7N-2BMFnIDD6w9UHtn7hk9E-3D_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le75TJ7qMxURSXprenmt-2FSG-2BHgDkF-2BYqkG-2BFxqszkV6eTIYxX3CGepI804AocO8eDWkPg99zTn-2BtxqLVatJTVuL3O3qayTezAf5wOTOhfY38UvXiHdbNfMd2SnyIJjEV8fW7ajvz2blXHSZ0fPAR5E0qkC8xK6RmVmY6e8BPhko5EQJfl8h9gt9bg6570hcyEgLnTmRA8Js42OfxNNxWx4ZM3UxpDr1lSqrCFCUsTQ0u2zqj7zIEdcwhFpYUubzLj38xpH-2BZylxQvZ-2FIgk8u6OxsOg-3D-3D" rel="nofollow" target="_blank">Embedded Linux Conference</a>, <span class="xn-chron">March 12 to 14</span> in <span class="xn-location">Portland, Ore.</span> The hackathon will enable registered SiFive Developers to be among the first test out SiFive's HiFive Unleashed board featuring the U540 SoC. </p>
   <p>Freedom U540 processor specs include: </p>
   <ul type="disc">
    <li>4+1 Multi-Core Coherent Configuration, up to 1.5 GHz </li>
    <li>4x U54 RV64GC Application Cores with Sv39 Virtual Memory Support </li>
    <li>1x E51 RV64IMAC Management Core </li>
    <li>Coherent 2MB L2 Cache </li>
    <li>64-bit DDR4 with ECC </li>
    <li>1x Gigabit Ethernet </li>
    <li>Built in 28nm process technology</li>
   </ul>
   <p>The HiFive Unleased development board specs include:</p>
   <ul type="disc">
    <li>SiFive Freedom U540 SoC </li>
    <li>8GB DDR4 with ECC for serious application development </li>
    <li>Gigabit Ethernet Port </li>
    <li>32MB Quad SPI Flash </li>
    <li>MicroSD Card for removable storage </li>
    <li>FMC Connector for future expansion with add-in cards</li>
   </ul>
   <p>Developers can purchase the HiFive Unleashed development board <a href="http://email.prnewswire.com/wf/click?upn=7VDqtAz2AW-2FeY7XnbvsasRDxURKmTlNx4iBvK5rqMzukLuxPI9gGCumkRMPA-2FmkJdRcQ528XgN3WzWXblGEK6g-3D-3D_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le75TJ7qMxURSXprenmt-2FSG-2BHgDkF-2BYqkG-2BFxqszkV6eTIYxX3CGepI804AocO8eDWkPg99zTn-2BtxqLVatJTVuL3O3qayTezAf5wOTOhfY38UvXiHdbNfMd2SnyIJjEV8fW7CNFx-2FdjEE9SgfDY10Vp1X0VW4Xm29nx6VVkiACALEShi17LXYX87bhQdsBQ7UqhJJIPN0VKwjyL24msDoyda-2BZvxKHP7jvBBQ8ZvGGzX6vzr1LhtopfvrIgWY0ch-2BKldpIcjbAr6uRKW-2Fd2agDPqnQ-3D-3D" rel="nofollow" target="_blank">here</a>. A limited batch of early access boards will ship in late <span class="xn-chron">March 2018</span>, with a wider release in June. For more information or to register for the hackathon, visit <a href="http://email.prnewswire.com/wf/click?upn=7VDqtAz2AW-2FeY7XnbvsasRDxURKmTlNx4iBvK5rqMzukLuxPI9gGCumkRMPA-2FmkJdRcQ528XgN3WzWXblGEK6g-3D-3D_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le75TJ7qMxURSXprenmt-2FSG-2BHgDkF-2BYqkG-2BFxqszkV6eTIYxX3CGepI804AocO8eDWkPg99zTn-2BtxqLVatJTVuL3O3qayTezAf5wOTOhfY38UvXiHdbNfMd2SnyIJjEV8fW7Lnj5jkKrkhTRHyupbH80xmmln3JZ2cegIGxoPriIft2K0XCGj3fEsF0iwziwrzXAT2WvvpdzCl7b0sBuGzlRo8j4uXtIxtdcVygFAH93IgltfXRyIxFegXqtjy2AJcTnWCqCRhxHI-2BgQvAAW4-2Bfycw-3D-3D" rel="nofollow" target="_blank">https://www.sifive.com/products/hifive-unleashed/</a>. &nbsp;</p>
   <p><b>About SiFive</b></p>
   <p>SiFive is the leading provider of market-ready processor core IP based on the free and open RISC-V instruction set architecture. Founded by RISC-V inventors <span class="xn-person">Andrew Waterman</span>, Yunsup Lee and <span class="xn-person">Krste Asanovic</span>, SiFive helps SoC designers reduce time-to-market and realize cost savings with customized, open-architecture processor cores, and democratizes access to optimized silicon by enabling system designers to build customized RISC-V based semiconductors. SiFive is located in Silicon Valley and has venture backing from Sutter Hill Ventures, Spark Capital and Osage University Partners. For more information, visit <a href="http://email.prnewswire.com/wf/click?upn=TwIh0OIjG8BOSB67uKqqj48r3QFvSyyIYkJ57msUMu4-3D_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le75TJ7qMxURSXprenmt-2FSG-2BHgDkF-2BYqkG-2BFxqszkV6eTIYxX3CGepI804AocO8eDWkPg99zTn-2BtxqLVatJTVuL3O3qayTezAf5wOTOhfY38UvXiHdbNfMd2SnyIJjEV8fW74p3MjuHJaxy0b-2BBSQQVkyMGVnfg1qVZrzCiC5O68btDFhhdtcvWFiLvYwk4H0ylDN3-2Fn6qEi-2B0Tr80f8aSI8cAPIlROT0CEzPcqORuqrIWEj-2FHe-2Bhr-2BSQLUlO77cK85YR1F9EiK7imA91tOlI9ROwg-3D-3D" rel="nofollow" target="_blank">http://www.sifive.com</a>.</p> 
   
   <p>SOURCE SiFive</p>CONTACT: Jack Kang, SiFive, (510) 673-1309, jack@sifive.com, Stephanie Chan, SHIFT Communications for SiFive, (646) 756-3713, sifive@shiftcomm.com<p style="Margin:0;Margin-bottom:10px;color:#4D4E53;font-family:Montserrat,Arial,sans-serif;font-size:14px;font-weight:400;line-height:28px;margin:0;margin-bottom:16px;padding:0;text-align:left">Web Site: <a href='http://email.prnewswire.com/wf/click?upn=TwIh0OIjG8BOSB67uKqqj-2F1CVLY3XZfeWc7dm-2FWgLxE-3D_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le75TJ7qMxURSXprenmt-2FSG-2BHgDkF-2BYqkG-2BFxqszkV6eTIYxX3CGepI804AocO8eDWkPg99zTn-2BtxqLVatJTVuL3O3qayTezAf5wOTOhfY38UvXiHdbNfMd2SnyIJjEV8fW7vV6I4j-2BLpGRrRaRZbn0FSuTu1WwbX0A5pYXA94FBkhfWIP8e6J9U-2BbfwwnwetQqPoq1TNLoCm35HwMDzX0YCgfdjPahKeMH7Khnt59bfwqn6cOdyrN7ZrcWFjqBSP01VItbNq0V13luzKi6k4U3EKw-3D-3D' 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