Synopsys' New HAPS Adaptor for Juno ARM Development Platform Accelerates Software Bring-up

Synopsys' New HAPS Adaptor for Juno ARM Development Platform Accelerates Software Bring-up

Adaptor Connects HAPS® Prototyping System with Juno ARM® Versatile(TM) Express Board to Speed SoC Prototyping and Integration for ARMv8-A based Designs

MOUNTAIN VIEW, Calif., July 6, 2016 /PRNewswire/ --

Highlights:

    --  HAPS Prototyping System with Juno ARM Development Platform accelerates
        software development, hardware/software integration and system
        validation for ARMv8-A SoCs
    --  Juno ARM Development Platform enables early porting of OS kernel or
        driver code for ARMv8-A processors
    --  HAPS integrated hardware and software system enables rapid prototyping
        with automated features for design planning, FPGA synthesis and debug
    --  DesignWare® IP Prototyping Kits for Juno ARM Development Platform
        speeds IP prototyping and integration into ARMv8-A based systems
Synopsys, Inc. (Nasdaq:SNPS) today announced a new HAPS adaptor that enables a HAPS FPGA-based Prototyping System to easily connect to a Juno ARM Development Platform. This software development platform includes the Juno Versatile Express board with ARM Cortex(®)-A72, or Cortex-A57 and Cortex-A53 MPCore(TM), Mali(TM)-T624 and reference software through Linaro Linux. Synopsys' HAPS FPGA-based integrated hardware and software prototyping system delivers the fastest time to first prototype, with the highest system performance, and supports up to 1.6 billion ASIC gates. By using HAPS systems with the Juno ARM Development Platform, designers can accelerate software development, hardware/software integration and system validation for ARMv8-A based system-on-chips (SoCs).

"There is a need for solutions such as HAPS to accelerate software development and IP validation as the ARM ecosystem is delivering increasingly complex SoC designs with even greater emphasis on performance, efficiency and scalability," said Jakub Lamik, vice president for product marketing, media processing group, ARM. "Designers face the challenge of creating ever more capable products while keeping costs in check and hitting tighter time to market expectations. HAPS can help achieve that by optimizing the design process and we have already seen accelerated results by connecting it to the Juno ARM Development Platform implementing the latest ARMv8-A and Mali technology."

HAPS FPGA-based physical prototyping systems include an integrated hardware and software tool flow for design planning, FPGA synthesis and debug. The HAPS ProtoCompiler software, which has built-in knowledge of the HAPS system architecture, automates partitioning to map IP blocks to complete subsystems and SoCs. This enables the fastest time to first prototype and subsequent compile iterations in hours compared to non-integrated prototypes. HAPS systems deliver superior debug visibility and automation through HAPS built-in Deep Trace Debug (DTD) technology, providing the ability to capture thousands of debug signals or seconds of trace data per FPGA at speed. In addition, Synopsys DesignWare IP Prototyping Kits support the Juno ARM Development Platform to provide a proven reference design that enables designers to start implementing IP in a SoC in minutes.

"Synopsys HAPS prototyping systems deliver the highest system performance and debug visibility that enable design and verification teams to avoid costly re-spins and accelerate their development schedules," said John Koeter, vice president of marketing for IP and prototyping at Synopsys. "By using the Synopsys HAPS adaptor for the Juno ARM Development Platform, designers can significantly reduce their time to first prototype and speed software development of ARMv8-A based designs."

Availability & Resources
The HAPS adaptor for the Juno ARM Development Platform is available now for HAPS-80, HAPS-70 and HAPS-DX systems. The DesignWare USB 3.0 Host IP Prototyping Kit for Juno ARM Development Platform is also available. IP Prototyping Kits for additional interface protocols are in development.

Learn more about HAPS: http://www.synopsys.com/Prototyping/FPGABasedPrototyping/Pages/HAPS.aspx.

    --  FPGA-based Prototyping blog: https://blogs.synopsys.com/hittingthemark/
    --  HAPS ProtoCompiler:
        http://www.synopsys.com/Prototyping/FPGABasedPrototyping/Pages/protocomp
        iler.aspx
    --  HAPS Debug:
        http://www.synopsys.com/Prototyping/FPGABasedPrototyping/Pages/troublesh
        oot-debug.aspx
    --  FPGA-based Prototyping Methodology Manual: http://www.synopsys.com/FPMM
    --  DesignWare IP Prototyping Kits:
        https://www.synopsys.com/IP/ip-accelerated/ip-prototyping-kits/Pages/def
        ault.aspx
About Synopsys
Synopsys, Inc. (Nasdaq:SNPS) is the Silicon to Software(TM) partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15(th) largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP, and is also growing its leadership in software quality and security solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest quality and security, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at http://www.synopsys.com.

Editorial Contacts:
Tess Cahayag

Synopsys, Inc.

650-584-5446
maritess@synopsys.com

SOURCE  Synopsys, Inc.

Synopsys, Inc.

Web Site: http://www.synopsys.com