eInfochips PCIe Verification IP Enables Reliability for High-speed Computing
Poster: SySAdmin
Posted on April 29, 2015 at 4:14:01 AM
eInfochips PCIe Verification IP Enables Reliability for High-speed Computing
SUNNYVALE, California, April 29, 2015 /PRNewswire/ --
Introduces VIP Integration and Verification Services for the Latest PCIe Standards
Compliant Expansion Cards
eInfochips, a Product Engineering Services provider, has announced the availability of
their PCIe Verification IP
[https://einfochips.com/index.php/solutions/verification-ips/pcie-e.html ] (VIP) based on
the latest available protocol standards from PCI-SIG. The VIP will reduce effort required
to setup the verification environment for ASIC
[https://einfochips.com/index.php/services/soc-asic-fpga-design.html ] (Application
Specific Integrated Circuit) and FPGA
[https://einfochips.com/index.php/services/soc-asic-fpga-design.html ] (Field Programmable
Gate Array) design verification by up to 10X. The VIP is aimed at reducing the time,
effort and cost of building verification environments with re-usable building blocks for
standard protocols. The PCIe VIP, coupled with eInfochips VLSI verification and VIP
integration services will significantly improve the PCIe interfaces, leading to faster and
consistent computing performance.
(Logo:
http://photos.prnewswire.com/prnh/20131029/648699 )
Parag Mehta, the Chief Marketing and Business Development Officer at eInfochips said,
"PCIe VIP is a reusable, highly configurable, pre-verified, plug-and-play verification
component developed in SystemVerilog solution. Our investment in PCIe VIP, with our
verification expertise, is ideal for semiconductor engineering teams to reduce product
risk with an accelerated schedule."
As an introductory promotion, eInfochips offers complimentary VIP licenses to the
first 3 customers that engage eInfochips for PCIe Verification Services.
PCIe Verification IP
eInfochips PCIe Verification IP supports PCIe 1.1, 2.0, 3.0, 3.1 and PIPE 4.3
specifications. It verifies all three layers of PCIe based design - Transaction, Data Link
and Physical Layer. It supports all data rates (2.5/5/7 GTPS) and is PCIe 4.0 ready. It
also supports all link widths (1-32) and comes with an exhaustive PCIe Compliance Suite.
Deliverables include SystemVerilog Source Code, Compliance Test Suite, Test and Coverage
Plan, Examples on Topological Usage, Sanity Test Cases, Sample Verification Environment,
User Guide and Release Notes.
Custom VIP Development and Verification Services
eInfochips has developed more than 32 VIPs for the world's leading EDA tools, as well
as other companies. The team has hands-on design experience on VIPs for key protocol
standards like MIPI
[https://einfochips.com/index.php/solutions/verification-ips/mipi-rffe-1-0-vip.html ],
USB3.0, DDR3, HDMI, eMMC
[https://einfochips.com/index.php/solutions/verification-ips/emmc-5-0.html ] and ARINC429
[https://einfochips.com/index.php/solutions/verification-ips/arinc-429.html ]. VIPs
designed by eInfochips power the development of hundreds of ASIC, SOC and FPGA devices.
eInfochips also offers verification services for top global semiconductor companies. The
company has expertise on building scalable, re-usable and modular verification
environments using leading UVM, OVM and VMM practices.
About eInfochips
eInfochips is a global product innovation partner recognized for technology leadership
by Gartner, Frost & Sullivan, NASSCOM and Zinnov. eInfochips has contributed to 500+
products for top global companies, with more than 10 million deployments across the world.
Visit us at http://www.einfochips.com [http://www.einfochips.com ], or stay connected on
LinkedIn [http://www.linkedin.com/company/einfochips ], Facebook
[https://www.facebook.com/eInfochips ], SlideShare
[http://www.slideshare.net/eInfochips_Solution ], Twitter
[https://twitter.com/einfochipsltd ] and YouTube
[http://www.youtube.com/user/einfochipsindia?feature=watch ]. To request information,
contact marketing@einfochips.com
Media Contact:
Mayank Shukla
US: +1-408-496-1882
IND: +91-79-2656-3705
Photo:
http://photos.prnewswire.com/prnh/20131029/648699
Photo:http://photos.prnewswire.com/prnh/20131029/648699
http://photoarchive.ap.org/
eInfochips
SUNNYVALE, California, April 29, 2015 /PRNewswire/ --
Introduces VIP Integration and Verification Services for the Latest PCIe Standards
Compliant Expansion Cards
eInfochips, a Product Engineering Services provider, has announced the availability of
their PCIe Verification IP
[https://einfochips.com/index.php/solutions/verification-ips/pcie-e.html ] (VIP) based on
the latest available protocol standards from PCI-SIG. The VIP will reduce effort required
to setup the verification environment for ASIC
[https://einfochips.com/index.php/services/soc-asic-fpga-design.html ] (Application
Specific Integrated Circuit) and FPGA
[https://einfochips.com/index.php/services/soc-asic-fpga-design.html ] (Field Programmable
Gate Array) design verification by up to 10X. The VIP is aimed at reducing the time,
effort and cost of building verification environments with re-usable building blocks for
standard protocols. The PCIe VIP, coupled with eInfochips VLSI verification and VIP
integration services will significantly improve the PCIe interfaces, leading to faster and
consistent computing performance.
(Logo:
http://photos.prnewswire.com/prnh/20131029/648699 )
Parag Mehta, the Chief Marketing and Business Development Officer at eInfochips said,
"PCIe VIP is a reusable, highly configurable, pre-verified, plug-and-play verification
component developed in SystemVerilog solution. Our investment in PCIe VIP, with our
verification expertise, is ideal for semiconductor engineering teams to reduce product
risk with an accelerated schedule."
As an introductory promotion, eInfochips offers complimentary VIP licenses to the
first 3 customers that engage eInfochips for PCIe Verification Services.
PCIe Verification IP
eInfochips PCIe Verification IP supports PCIe 1.1, 2.0, 3.0, 3.1 and PIPE 4.3
specifications. It verifies all three layers of PCIe based design - Transaction, Data Link
and Physical Layer. It supports all data rates (2.5/5/7 GTPS) and is PCIe 4.0 ready. It
also supports all link widths (1-32) and comes with an exhaustive PCIe Compliance Suite.
Deliverables include SystemVerilog Source Code, Compliance Test Suite, Test and Coverage
Plan, Examples on Topological Usage, Sanity Test Cases, Sample Verification Environment,
User Guide and Release Notes.
Custom VIP Development and Verification Services
eInfochips has developed more than 32 VIPs for the world's leading EDA tools, as well
as other companies. The team has hands-on design experience on VIPs for key protocol
standards like MIPI
[https://einfochips.com/index.php/solutions/verification-ips/mipi-rffe-1-0-vip.html ],
USB3.0, DDR3, HDMI, eMMC
[https://einfochips.com/index.php/solutions/verification-ips/emmc-5-0.html ] and ARINC429
[https://einfochips.com/index.php/solutions/verification-ips/arinc-429.html ]. VIPs
designed by eInfochips power the development of hundreds of ASIC, SOC and FPGA devices.
eInfochips also offers verification services for top global semiconductor companies. The
company has expertise on building scalable, re-usable and modular verification
environments using leading UVM, OVM and VMM practices.
About eInfochips
eInfochips is a global product innovation partner recognized for technology leadership
by Gartner, Frost & Sullivan, NASSCOM and Zinnov. eInfochips has contributed to 500+
products for top global companies, with more than 10 million deployments across the world.
Visit us at http://www.einfochips.com [http://www.einfochips.com ], or stay connected on
LinkedIn [http://www.linkedin.com/company/einfochips ], Facebook
[https://www.facebook.com/eInfochips ], SlideShare
[http://www.slideshare.net/eInfochips_Solution ], Twitter
[https://twitter.com/einfochipsltd ] and YouTube
[http://www.youtube.com/user/einfochipsindia?feature=watch ]. To request information,
contact marketing@einfochips.com
Media Contact:
Mayank Shukla
US: +1-408-496-1882
IND: +91-79-2656-3705
Photo:
http://photos.prnewswire.com/prnh/20131029/648699
Photo:http://photos.prnewswire.com/prnh/20131029/648699
http://photoarchive.ap.org/
eInfochips